The present invention generally relates to electrostatic discharge (ESD) protection devices in complementary metal-oxide semiconductor (CMOS) technologies, and more specifically relates to an implantation method to improve ESD robustness of thick-oxide grounded-gate NMOSFET's (metal-oxide-semiconductor flied effect transistor with n-type channel) in deep-submicron CMOS technologies.
In CMOS technologies, grounded-gate NMOS fingers (ggNMOSFET's) without silicide are widely used as the primary ESD protection device in I/O buffers and power rail clamps because of ESD robustness. However, in order to overcome the hot carrier injection lifetime issue, lightly-doped drain (LDD) doping concentration is very low for 2.5V and 3.3V NMOS devices using thick gate-oxide in process. This often leads to a lower ESD protection performance in thick gate-oxide ggNMOSFET's. Therefore, ESD robustness of standard 2.5V and 3.3V ggNMOSFET's without silicide are limited by LDD implantation.
In order to enhance ESD robustness, ESD implants had been reported and included into process flow to modify the thick gate-oxide device structures for ESD protection. See, for example, U.S. Pat. Nos. 5,672,527 and 5,374,565, both of which are incorporated herein by reference in their entirety. In U.S. Pat. No. 5,672,527, the N-type ESD implantation was used to cover the LDD structure and make a deeper junction in thick gate-oxide device structures for ESD protection. In U.S. Pat. No. 5,374,565, the P-type ESD implantation with a higher doping concentration located under the drain junction of thick gate-oxide NMOS device was used to reduce the junction breakdown voltage and earlier turn on the parasitic lateral BJT of the NMOS device. These two approaches are well-known methods used in the foundry processes, especially for stacked-gate NMOS fingers for 5V-tolerant I/O ESD protection. However, an extra ESD implant mask is required for these approaches and thus increase the process cycle time. In these approaches, a longer drain-contact-to-gate spacing (DCGS) is also needed for improvement of ESD robustness.